Interests

Reconfigurable Computing; Hardware/Software Codesign; Computer Architecture; Sustainable Computing; Innovation Education; FPGA; Operating System Design for Reconfigurable Computers

Awards

• Test-of-Time Award. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) [2021]

• IEEE-HKN C. Holmes MacDonald Outstanding Teaching Award [2021]

• Croucher Innovation Award [2013]

• Outstanding Teaching Award (Team) [2012]

• Best Teacher Award, Faculty of Engineering, University of Hong Kong [2011-2012]

Bio

Hayden So is the Director and Associate Professor of the School of Innovation, University of Hong Kong. Previously, he has been with the Department of Electrical & Electronic Engineering since 2007, where he served as the Co-director of the Computer Engineering program until 2024. His research is in the area of reconfigurable computing, hardware/software co-design, computer architecture, embedded systems and AI hardware. He is passionate about STEM education and believes in the transformative power of hands-on innovation projects on a person. His is a "triple bear" -- having graduated from University of California, Berkeley three times with Ph.D., M.S., and B.S. degrees in Electrical Engineering and Computer Sciences. When not at work, he is usually traveling around the world looking for great coffee, great food, and great people.

Selected Publications

• C. Y. Lai, M. Downie, E. Schuldenfrei, H. Xu, T. Gao, H. Huang, and H. K.-H. So, "Infrastructural occupancy analytics with bluetooth low energy enabled smart lighting system and spatial carbon dioxide sensing," Journal of Building Engineering, vol. 112, pp. 113751, 2025. [doi>https://doi.org/10.1016/j.jobe.2025.113751]

• J. Wu, M. Song, J. Zhao, Y. Gao, J. Li, and H. K.-H. So, "TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture," ACM Trans. Reconfigurable Technol. Syst., vol. 18, no. 1, March, 2025. [doi>10.1145/3714416]

• Z. Wu, M. Wang, and H. K.-H. So, "A Hardware-Software Design Framework for SpMV Acceleration with Flexible Access Pattern Portfolio," in 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA), pp. 836-848, March, 2025. [doi>10.1109/HPCA61900.2025.00068]

• M. Wang, I. McInerney, B. Stellato, F. Tu, S. Boyd, H. K.-H. So, and K.-T. Cheng, "Multi-Issue Butterfly Architecture for Sparse Convex Quadratic Programming," in 2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 1574-1587, 2024. [doi>10.1109/MICRO61859.2024.00115]

• M. Wang, S. Rasoulinezhad, P. H. W. Leong, and H. K.-H. So, "NITI: Training Integer Neural Networks Using Integer-Only Arithmetic," IEEE Transactions on Parallel and Distributed Systems, vol. 33, no. 11, pp. 3249-3261, 2022. [doi>10.1109/TPDS.2022.3149787]